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Memory architecture
Memory architecture describes the methods used to implement electronic computer data storage in a manner that is a combination of the fastest, most reliable, most durable, and least expensive way to store and retrieve information. Depending on the specific application, a compromise of one of these requirements may be necessary in order to improve another requirement.
For example, dynamic memory is commonly used for primary data storage due to its fast access speed. However dynamic memory must be repeatedly refreshed with a surge of current millions of time per second, or the stored data will decay and be lost. Flash memory allows for long-term storage over a period of years, but it is much slower than dynamic memory, and the static memory storage cells wear out with frequent use.
Similarly, the data bus is often designed to suit specific needs such as serial or parallel data access, and the memory may be designed to provide for parity error detection or even error correction in expensive business systems.
== See also ==
*8-bit
*16-bit
*32-bit
*64-bit
*Cache-only memory architecture (COMA)
*Cache memory
*Conventional memory
*Deterministic memory
*Distributed shared memory (DSM)
*Dual-channel architecture
*ECC memory
*Expanded memory
*Extended memory
*Flat memory model
*Harvard architecture
*High Memory Area (HMA)
*Lernmatrix
*Memory hierarchy
*Memory level parallelism
*Memory model
*Memory protection
*Memory-disk synchronization
*Non-Uniform Memory Access (NUMA)
*PCI memory hole
*Processor register
*Registered memory
*Shared memory (interprocess communication)
*Shared Memory Architecture (SMA)
*Stack-based memory allocation
*Tagged architecture
*Uniform Memory Access (UMA)
*Universal memory
*Video memory
*von Neumann architecture
*X86 memory segmentation
抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』
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